26 m_last_start_ticks(0),
27 m_last_cycle_ticks(0),
29 ::memset(&m_state, 0,
sizeof(m_state));
33 FW_ASSERT(queueDepth == 1, static_cast<FwAssertArgType>(
40 m_cycle = cycle_ticks;
47 if (m_state.
used > 0) {
50 static_cast<FwAssertArgType>(previous.
start),
51 static_cast<FwAssertArgType>(
start));
53 static_cast<FwAssertArgType>(previous.
start),
54 static_cast<FwAssertArgType>(
start));
66 FW_ASSERT((
start + length) <= m_cycle, static_cast<FwAssertArgType>(
start), static_cast<FwAssertArgType>(length),
67 static_cast<FwAssertArgType>(m_cycle));
68 FW_ASSERT(context > m_cycle, static_cast<FwAssertArgType>(context), static_cast<FwAssertArgType>(m_cycle));
81 entry.
context = (context !=
DONT_CARE) ? context / m_cycle : getNextContext(port);
85 FW_ASSERT(std::numeric_limits<U32>::max() / m_ticks_rollover >= entry.
context);
86 m_ticks_rollover *= entry.
context;
89 entry.
contextType = (context !=
DONT_CARE) ? PhaserContextType::COUNT : PhaserContextType::SEQUENTIAL;
111 void ActivePhaser ::Tick_internalInterfaceHandler() {
113 U32 full_ticks = m_ticks;
117 if ((this->timeInCycle(full_ticks) >= m_cycle) && (m_state.
current == m_state.
used)) {
118 m_last_cycle_ticks = full_ticks;
120 m_cycle_count = (m_cycle_count + 1) % m_ticks_rollover;
124 if (finishChild(full_ticks) != ActivePhaser::FinishStatus::LATE) {
125 startChild(full_ticks);
132 return ActivePhaser::FinishStatus::UNKNOWN;
139 const U32 execution_time = full_ticks - m_last_start_ticks;
140 const U32 expected_time = entry.length;
143 entry.started =
false;
147 if (execution_time > expected_time) {
149 return ActivePhaser::FinishStatus::LATE;
152 return ActivePhaser::FinishStatus::ON_TIME;
155 void ActivePhaser ::startChild(U32 full_ticks) {
159 timeInCycle(full_ticks))
168 U32 context = (entry.contextType ==
SEQUENTIAL) ? entry.
context : m_cycle_count % entry.context;
169 entry.started =
true;
170 m_last_start_ticks = full_ticks;
171 this->PhaserMemberOut_out(entry.port, context);
174 U32 ActivePhaser ::getNextContext(
FwIndexType port) {
179 for (U32 i = 0; i < m_state.
used; i++) {
187 U32 ActivePhaser ::timeInCycle(U32 full_ticks) {
188 return (full_ticks - m_last_cycle_ticks);
void configure(U32 cycle_ticks)
PlatformSizeType FwSizeType
void unLock()
unlock the mutex and assert success
FinishStatus
Finish status.
PhaserStateEntry entries[MAX_CHILDREN]
bool isConnected_PhaserMemberOut_OutputPort(FwIndexType portNum)
ActivePhaser(const char *const compName)
Construct ActivePhaser object.
void init()
Object initializer.
configuration for phasing
PhaserContextType contextType
void register_phased(FwIndexType port, U32 length, U32 start=DONT_CARE, U32 context=DONT_CARE)
~ActivePhaser()
Destroy ActivePhaser object.
void Tick_internalInterfaceInvoke()
Internal interface base-class function for Tick.
static const U32 DONT_CARE
FwIndexType getNum_PhaserMemberOut_OutputPorts() const
Auto-generated base for ActivePhaser component.
PlatformIndexType FwIndexType
RateGroupDivider component implementation.
void start(FwTaskPriorityType priority=Os::Task::TASK_PRIORITY_DEFAULT, FwSizeType stackSize=Os::Task::TASK_DEFAULT, FwSizeType cpuAffinity=Os::Task::TASK_DEFAULT, FwTaskIdType identifier=static_cast< FwTaskIdType >(Os::Task::TASK_DEFAULT))
called by instantiator when task is to be started
U32 used
The number of registered tasks (the last registered task is at used - 1)
U32 current
The current child task entry index.
void lock()
lock the mutex and assert success
void log_WARNING_HI_MissedDeadline(FwIndexType p, U32 start, U32 length, U32 ticks)